| DC Field | Value | Language |
|---|
| dc.contributor.author | Golumbeanu, Virgil | - |
| dc.contributor.author | Svasta, Paul | - |
| dc.contributor.author | Ionescu, Ciprian | - |
| dc.date.accessioned | 2018-08-28T14:15:46Z | - |
| dc.date.available | 2018-08-28T14:15:46Z | - |
| dc.date.issued | 2002 | - |
| dc.identifier.citation | Golumbeanu V. The reflections produced by lumped load of digital signal line / Virgil Golumbeanu, Paul Svasta, Ciprian Ionescu // Вісник Національного університету "Львівська політехніка". – 2002. – № 458 : Елементи теорії та прилади твердотілої електроніки. – С. 99–105. – Bibliography: 10 titles. | uk_UA |
| dc.identifier.uri | https://ena.lpnu.ua/handle/ntb/42526 | - |
| dc.description.abstract | In interconnection technique of digital circuits in general the matched lines method for reducing the influence of reflections in a view to a good working of interconnected circuits is used. Due to the input capacitance of digital circuits appears a reactance load. Although the matching is very good realized from the viewpoint of the resistive load, there is a reactive mismatching that can produce reflections at high frequency. Using Laplace transformation the reflections produced by parasitic capacitance load will be determined. These reflections will be analyzed depending on the type of the digital circuits and the parameters of the interconnection line. For some types of digital circuits the maximum fanout from this point of view will be determined. | uk_UA |
| dc.language.iso | en | uk_UA |
| dc.publisher | Видавництво Національного університету "Львівська політехніка" | uk_UA |
| dc.subject | printed circuit board | uk_UA |
| dc.subject | reflections | uk_UA |
| dc.subject | digital circuits | uk_UA |
| dc.subject | capacitance load | uk_UA |
| dc.title | The reflections produced by lumped load of digital signal line | uk_UA |
| dc.type | Article | uk_UA |
| dc.rights.holder | © Virgil Golumbeanu, Paul Svasta, Ciprian Ionescu, 2002 | uk_UA |
| dc.contributor.affiliation | University Politehnica Bucharest | uk_UA |
| dc.coverage.country | UA | uk_UA |
| dc.format.pages | 99–105 | - |
| dc.relation.references | [1] A. I. Schwab, “Electromagnetische Vertraglichkeit”, Springer-Verlag, Berlin, New York, 1993. [2] P. Chatterton, M. Houlten, “EMC Electromagnetic Theory to Practical Design”, John Wiley&Sons, New York, 1991. [3] M. Mardiguian, “Interference Control in Computers and Microprocessor - Based Equipment”, Don White, Gainesville, 1987. [4] D. R. J. White, “EMI Control in the Design of Printed Circuit Boards and Backplanes”, Don White, Gainesville, 1986. [5] W. R. Blood, “MECL System Design Handbook”, Motorola Inc., 1988. [6] M. Montrose, “Printed Circuit Board Design Techniques for EMC Compliance”, IEEE Press, New York, 1996. [7] Z. Felendzer, B. Janiczak, T. Gorecki, "Computer-aided Design of Multilayer Printed Circuit Boards with Respect to Reflection and Crosstalk Effects" Proc. of the 20-th Conference of the International Society for Hybrid Microelectronics, Poland Chapter, Jurata, Poland, Sept. 1996, pp. 23-30. [8] M. Montrose, "Analysis on the Effectiveness of Clock Trace Termination Methods and Trace Lengths on a Printed Circuit Board, Proc. of the IEEE 1996 International Symposium on Electromagnetic Compatibility, Santa Clara, California, 1996, pp. 453-458. [9] G. Becke, P. Forstner, E. Haseloff, J. Huchzermeier, “Digital Design Seminar”, Texas Instruments, 1996. [10] V. Golumbeanu, P. Svasta, N. D. Codreanu, "The Noise Immunity of the Digital Circuits", Proc. of the 19th International Spring Seminar on Electronics Technology, May, 1996, Göd, Hungary, pp. 114-119. | uk_UA |
| dc.citation.journalTitle | Елементи теорії та прилади твердотілої електроніки | - |
| dc.coverage.placename | Львів | uk_UA |
| Appears in Collections: | Елементи теорії та прилади твердотілої електроніки. – 2002. – №458
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