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  1. Електронний науковий архів Науково-технічної бібліотеки Національного університету "Львівська політехніка"
  2. Електронний архів Науково-технічної бібліотеки
  3. Вісники та науково-технічні збірники, журнали
  4. Комп'ютерні системи та мережі
  5. Комп'ютерні системи та мережі. – 2019. – Том 1, № 1

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Please use this identifier to cite or link to this item: https://oldena.lpnu.ua/handle/ntb/56359
Title: Порівняння AEAD-алгоритмів для вбудованих систем інтернету речей
Other Titles: Comparison of AEAD-algorithms for embedded systems internet of things
Authors: Совин, Я. Р.
Хома, В. В.
Отенко, В. І.
Sovyn, Y.
Khoma, V.
Otenko, V.
Affiliation: Національний університет “Львівська політехніка”
Lviv Polytechnic National University
Bibliographic description (Ukraine): Совин Я. Р. Порівняння AEAD-алгоритмів для вбудованих систем інтернету речей / Я. Р. Совин, В. В. Хома, В. І. Отенко // Комп’ютерні системи та мережі. — Львів : Видавництво Львівської політехніки, 2019. — Том 1. — № 1. — С. 76–91.
Bibliographic description (International): Sovyn Y. Comparison of AEAD-algorithms for embedded systems internet of things / Y. Sovyn, V. Khoma, V. Otenko // Kompiuterni systemy ta merezhi. — Lviv : Lviv Politechnic Publishing House, 2019. — Vol 1. — No 1. — P. 76–91.
Is part of: Комп’ютерні системи та мережі, 1 (1), 2019
Journal/Collection: Комп’ютерні системи та мережі
Issue: 1
Volume: 1
Issue Date: 1-Mar-2019
Publisher: Видавництво Львівської політехніки
Lviv Politechnic Publishing House
Place of the edition/event: Львів
Lviv
UDC: 004.056
061.68
Keywords: AEAD
AES-GCM
ChaCha20-Poly1305
часові атаки
атаки через сторонні канали
IoT
поліноміальне множення
мікроконтролери
AEAD
AES-GCM
ChaCha20-Poly1305
Timing Analysis
Side Channel Attacks
IoT
polynomial multiplication
microcontrollers
Number of pages: 16
Page range: 76-91
Start page: 76
End page: 91
Abstract: Виконано порівняння за швидкодією і вимогами до пам’яті реалізацій АЕAD-шифрів AESGCM та ChaCha20-Poly1305 для типових 8/16/32-бітних вбудованих low-end процесорів у складі пристроїв Інтернету речей за різних підходів до забезпечення стійкості до часових атак і простих атак на енергоспоживання. Особливу увагу приділено низькорівневій реалізації множення в полях GF(2128) із константним часом виконання як ключовій операції GCM, оскільки у low-end процесорів немає готової інструкції для carry-less множення. Для кожного процесорного ядра AVR/MSP430/ARM Cortex-M3 відповідно запропонована реалізація carry-less множення з константним часом виконання, яка за ефективністю близька до алгоритмів із неконстантним часом виконання.
The article compares the performance and memory requirements of AES-GCM and ChaCha20- Poly1305 AED encryption solutions for typical 8/16/32-bit embedded low-end processors in the Internet of Things device with different approaches to providing tolerance to Timing Attacks and Simple Power Analysis Attacks. Particular attention is given to the low-level multiplication implementation in GF(2128) with constant execution time as a key GCM operation, since low-end processors do not have ready instructions for carry-less multiplication. For each AVR/MSP430/ARM Cortex-M3 processor core, a carry-less multiplication with a constant execution time, which is similar in efficiency to algorithms with a non-constant execution time, is proposed.
URI: https://ena.lpnu.ua/handle/ntb/56359
ISSN: 2707-2371
Copyright owner: © Національний університет “Львівська політехніка”, 2019
© Совин Я. Р., Хома В. В., Отенко В. І., 2019
URL for reference material: https://github.com/ctz/cifra
http://loup-vaillant.fr/tutorials/poly1305-design
https://github.com/floodyberry/poly1305-donna/blob/master/poly1305-donna-32.h
References (Ukraine): 1. Alex Biryukov and Leo Perrin. State of the Art in Lightweight Symmetric Cryptography. Cryptology ePrint Archive, Report 2017/511, 2017.
2. Sergey Panasenko and Sergey Smagin. Lightweight Cryptography: Underlying Principles and Approaches. International Journal of Computer Theory and Engineering, Vol. 3, No. 4, August 2011, pp. 516–520.
3. Sovyn Ya., Nakonechny Yu., Opirskyy I., Stakhiv M. Analysis of hardware support of cryptography in Internet of Things-devices // Ukrainian Scientific Journal of Information Security, 2018, vol. 24, issue 1, p. 36–48.
4. Eldewahi A. E. W., Sharfi T. M. H., Mansor A. A., Mohamed N. A. F. and Alwahbani S. M. H. SSL/TLS attacks: Analysis and evaluation. 2015 International Conference on Computing, Control, Networking, Electronics and Embedded Systems Engineering (ICCNEEE), Khartoum, 2015, pp. 203–208.
5. Schaumont P. Security in the Internet of Things: A challenge of scale. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, Lausanne, 2017, pp. 674–679.
6. Yang Y., Wu L., Yin G., Li L. and Zhao H. A Survey on Security and Privacy Issues in Internet-of-Things. IEEE Internet of Things Journal, Vol. 4, No. 5, pp. 1250–1258, Oct., 2017.
7. Dworkin M. Recommendation for Block Cipher Modes of Operation: Galois/Counter Mode (GCM) for Confidentiality and Authentication, NIST Special Publication 800-38D, November, 2007.
8. McGrew D. An interface and algorithms for authenticated encryption. IETF RFC 5116. January, 2008.
9. Nir Y., Langley A. ChaCha20 and Poly1305 for IETF Protocols. RFC 8439. June 2018.
10. Langley A., Chang W., Mavrogiannopoulos N., Strombergson J., Josefsson S. ChaCha20-Poly1305 Cipher Suites for Transport Layer Security (TLS). RFC 7905. June 2016.
11. “CAESAR Competition for Authenticated Encryption: Security, Applicability, and Robustness”. 2012.
12. Intel Architecture Instruction Set Extensions and Future Features Programming Reference. March, 2018.
13. Shay Gueron. Intel Advanced Encryption Standard (AES) New Instructions Set. Intel White Paper, 2012.
14. Shay Gueron, Michael E. Kounavis. Intel carry-less multiplication instruction and its usage for computing the GCM mode. Intel White Paper, April, 2014.
15. ARM Architecture Reference Manual. ARMv8, for ARMv8-A architecture profile. December, 2017.
16. Agner Fog. Instruction tables. Lists of instruction latencies, throughputs and micro-operation breakdowns for Intel, AMD and VIA CPUs. 2018.
17. Shay Gueron, Adam Langley, Yehuda Lindell. AES-GCM-SIV Nonce Misuse-Resistant Authenticated Encryption. CFRG Meeting EUROCRYPT 2016, May, 2016.
18. Daemen J. and Rijmen V. The design of Rijndael. Springer-Verlag New York, Inc. Secaucus, NJ, USA, 2002.
19. Conrado P. L. Gouvea, Julio Lopez. High Speed Implementation of Authenticated Encryption for the MSP430X Microcontroller. Progress in Cryptology LATINCRYPT 2012. LNCS, Vol. 7533, pp. 288–304. Springer, Heidelberg (2012).
20. “The Cifra Project. A collection of cryptographic primitives targeted at embedded use.” https://github.com/ctz/cifra, Feb., 2017.
21. F. De Santis, A. Schauer and G. Sigl. ChaCha20-Poly1305 authenticated encryption for high-speed embedded IoT applications. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, Lausanne, 2017, pp. 692–697.
22. Atmel Corporation. 8-bit AVR Microcontroller with 8/16K Bytes of ISP Flash and USB Controller. Technical Reference Manual, 2008.
23. Texas Instruments. User’s Guide. MSP430FR58xx/59xx/68xx, and MSP430FR69xx Family, 2015.
24. ARM, “ARM and Thumb-2 Instruction Set”, 2016.
25. McGrew D. A. and Viega J. The Galois/Counter Mode of Operation (GCM). Submission to NIST, 2005.
26. Loup Vaillant. The design of Poly1305, 2017. http://loup-vaillant.fr/tutorials/poly1305-design.
27. https://github.com/floodyberry/poly1305-donna/blob/master/poly1305-donna-32.h.
References (International): 1. Alex Biryukov and Leo Perrin. State of the Art in Lightweight Symmetric Cryptography. Cryptology ePrint Archive, Report 2017/511, 2017.
2. Sergey Panasenko and Sergey Smagin. Lightweight Cryptography: Underlying Principles and Approaches. International Journal of Computer Theory and Engineering, Vol. 3, No. 4, August 2011, pp. 516–520.
3. Sovyn Ya., Nakonechny Yu., Opirskyy I., Stakhiv M. Analysis of hardware support of cryptography in Internet of Things-devices, Ukrainian Scientific Journal of Information Security, 2018, vol. 24, issue 1, p. 36–48.
4. Eldewahi A. E. W., Sharfi T. M. H., Mansor A. A., Mohamed N. A. F. and Alwahbani S. M. H. SSL/TLS attacks: Analysis and evaluation. 2015 International Conference on Computing, Control, Networking, Electronics and Embedded Systems Engineering (ICCNEEE), Khartoum, 2015, pp. 203–208.
5. Schaumont P. Security in the Internet of Things: A challenge of scale. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, Lausanne, 2017, pp. 674–679.
6. Yang Y., Wu L., Yin G., Li L. and Zhao H. A Survey on Security and Privacy Issues in Internet-of-Things. IEEE Internet of Things Journal, Vol. 4, No. 5, pp. 1250–1258, Oct., 2017.
7. Dworkin M. Recommendation for Block Cipher Modes of Operation: Galois/Counter Mode (GCM) for Confidentiality and Authentication, NIST Special Publication 800-38D, November, 2007.
8. McGrew D. An interface and algorithms for authenticated encryption. IETF RFC 5116. January, 2008.
9. Nir Y., Langley A. ChaCha20 and Poly1305 for IETF Protocols. RFC 8439. June 2018.
10. Langley A., Chang W., Mavrogiannopoulos N., Strombergson J., Josefsson S. ChaCha20-Poly1305 Cipher Suites for Transport Layer Security (TLS). RFC 7905. June 2016.
11. "CAESAR Competition for Authenticated Encryption: Security, Applicability, and Robustness". 2012.
12. Intel Architecture Instruction Set Extensions and Future Features Programming Reference. March, 2018.
13. Shay Gueron. Intel Advanced Encryption Standard (AES) New Instructions Set. Intel White Paper, 2012.
14. Shay Gueron, Michael E. Kounavis. Intel carry-less multiplication instruction and its usage for computing the GCM mode. Intel White Paper, April, 2014.
15. ARM Architecture Reference Manual. ARMv8, for ARMv8-A architecture profile. December, 2017.
16. Agner Fog. Instruction tables. Lists of instruction latencies, throughputs and micro-operation breakdowns for Intel, AMD and VIA CPUs. 2018.
17. Shay Gueron, Adam Langley, Yehuda Lindell. AES-GCM-SIV Nonce Misuse-Resistant Authenticated Encryption. CFRG Meeting EUROCRYPT 2016, May, 2016.
18. Daemen J. and Rijmen V. The design of Rijndael. Springer-Verlag New York, Inc. Secaucus, NJ, USA, 2002.
19. Conrado P. L. Gouvea, Julio Lopez. High Speed Implementation of Authenticated Encryption for the MSP430X Microcontroller. Progress in Cryptology LATINCRYPT 2012. LNCS, Vol. 7533, pp. 288–304. Springer, Heidelberg (2012).
20. "The Cifra Project. A collection of cryptographic primitives targeted at embedded use." https://github.com/ctz/cifra, Feb., 2017.
21. F. De Santis, A. Schauer and G. Sigl. ChaCha20-Poly1305 authenticated encryption for high-speed embedded IoT applications. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, Lausanne, 2017, pp. 692–697.
22. Atmel Corporation. 8-bit AVR Microcontroller with 8/16K Bytes of ISP Flash and USB Controller. Technical Reference Manual, 2008.
23. Texas Instruments. User’s Guide. MSP430FR58xx/59xx/68xx, and MSP430FR69xx Family, 2015.
24. ARM, "ARM and Thumb-2 Instruction Set", 2016.
25. McGrew D. A. and Viega J. The Galois/Counter Mode of Operation (GCM). Submission to NIST, 2005.
26. Loup Vaillant. The design of Poly1305, 2017. http://loup-vaillant.fr/tutorials/poly1305-design.
27. https://github.com/floodyberry/poly1305-donna/blob/master/poly1305-donna-32.h.
Content type: Article
Appears in Collections:Комп'ютерні системи та мережі. – 2019. – Том 1, № 1

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