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Please use this identifier to cite or link to this item: https://oldena.lpnu.ua/handle/ntb/45647
Title: Logical algorithms of the accelerated multiplication with minimum quantity of nonzero digits of the converted multipliers
Authors: Korol, Ihor
Korol, Ivan
Affiliation: Uzhhorod National University
Bibliographic description (Ukraine): Korol I. Logical algorithms of the accelerated multiplication with minimum quantity of nonzero digits of the converted multipliers / Ihor Korol, Ivan Korol // Advances in Cyber-Physical Systems : scientific journal. — Львів : Lviv Politechnic Publishing House, 2019. — Vol 4. — No 1. — P. 25–30.
Bibliographic description (International): Korol I. Logical algorithms of the accelerated multiplication with minimum quantity of nonzero digits of the converted multipliers / Ihor Korol, Ivan Korol // Advances in Cyber-Physical Systems : scientific journal. — Lviv Politechnic Publishing House, 2019. — Vol 4. — No 1. — P. 25–30.
Is part of: Advances in Cyber-Physical Systems : scientific journal, 1 (4), 2019
Issue: 1
Volume: 4
Issue Date: 26-Feb-2019
Publisher: Lviv Politechnic Publishing House
Place of the edition/event: Львів
Keywords: extended binary code
accelerated multiplication device
AHDL
MAX+plus
Number of pages: 6
Page range: 25-30
Start page: 25
End page: 30
Abstract: The article presents a new algorithm of accelerated multiplication, in which the time of multiplication has been reduced through the decrease in the number of nonzero digits of the multiplier. In this case, the multiplier has been presented in the form of the extended binary code. The article proves the algorithm's efficiency in comparison to previously known methods. The developed algorithm has been implemented using the hardware description language AHDL (Altera Hardware Description Language) in the Logic Development System MAX+PLUS II.
URI: https://ena.lpnu.ua/handle/ntb/45647
Copyright owner: © Національний університет “Львівська політехніка”, 2019
© Korol Ihor, Korol Ivan, 2019
References (Ukraine): 1. Melnyk A. O. Computer Architecture, Lutsk, 2008. – 470 p. (in Ukrainian).
2. Melnyk A. O., Melnyk V. A. Personal computers: architecture, design, application, Lviv, 2013. – 516 p.
3. Knuth, Donald E. The Art of Computer Programming, 3rd ed. Reading , MA: Addison-Wesley, 1998. – 762 p.
4. Korniichuk V. I., Tarasenko V. P., Tarasenko-Kliatchenko O. V. Basics of Computer Arithmetic, Kyiv, 2006. – 164 p. (in Ukrainian).
5. Tsmots I. G. Parallel algorithms and matrix VLSI structures of multiplication devices for real-time computer systems. Infornation Technologies and Systems. Lviv, 2004. Vol. 7. N 1, pp. 5–16.
References (International): 1. Melnyk A. O. Computer Architecture, Lutsk, 2008, 470 p. (in Ukrainian).
2. Melnyk A. O., Melnyk V. A. Personal computers: architecture, design, application, Lviv, 2013, 516 p.
3. Knuth, Donald E. The Art of Computer Programming, 3rd ed. Reading , MA: Addison-Wesley, 1998, 762 p.
4. Korniichuk V. I., Tarasenko V. P., Tarasenko-Kliatchenko O. V. Basics of Computer Arithmetic, Kyiv, 2006, 164 p. (in Ukrainian).
5. Tsmots I. G. Parallel algorithms and matrix VLSI structures of multiplication devices for real-time computer systems. Infornation Technologies and Systems. Lviv, 2004. Vol. 7. N 1, pp. 5–16.
Content type: Article
Appears in Collections:Advances In Cyber-Physical Systems. – 2019. – Vol. 4, No. 1

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